You are kindly invited to:
INTEL’S ANNUAL SYMPOSIUM ON VLSI CAD AND VALIDATION
Tuesday, November 10, 2015, 7:40 - 16:40
Auditorium Floor 2, Room 280, Electrical Engineering Building, Technion

 

 

  Big Data Analytics for CAD Applications

 

Schedule

07:40 - 08:30

Registration and light refreshments

08:30 - 08:40

Opening

08:40 - 09:40

Keynote: Machine Learning Building Blocks
Shai Fine (Intel Labs)


09:40 - 10:00

Coffee break

10:00 - 10:50

Data Mining in EDA and Test – Principles, Opportunities, and Challenges
Li-C. Wang (UCSB)


10:50 - 11:40

Deep Neural Networks, optimal data representation: An Information Theoretic approach
Naftali Tishby (The Hebrew University)


11:40 - 13:00

Lunch

13:00 - 13:50

Design-Assisted Development of Design Rules
Puneet Gupta (UCLA)


13:50 - 14:40

Learning-Based Analytical Power and Performance Modeling
Andreas Gerstlauer (The University of Texas at Austin)


14:40 - 15:00

Coffee break

15:00 - 15:50

Human-centered Computing: Challenges and Perspectives
Nicu Sebe (University of Trento)


15:50 - 16:40

A Brain-inspired Information Processing Framework: Applications and Accelerations
Qinru Qiu (Syracuse University)


For more information please call Sharon Raz: 04-8656525.

Email: sharon.raz@intel.com

Registration Form